The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the inventors hereof, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted to be prior art against the present disclosure.
Computer systems usually include, at least, a memory and a processor. Although memories can be accessed relatively quickly (e.g., each access taking a few hundred clock cycles), it is increasingly viewed as a bottleneck to high speed systems as the processor must pause execution of a current instruction in order to wait for the memory access to complete. In other words, the processor pipeline can become more efficient with a faster mechanism for data and instruction fetching. To alleviate this problem, modern computer systems have implemented high-speed storage solutions in the vicinity of the processor itself. This fast, local storage, called cache, sits in between the processor and the main memory and store frequently-accessed information found on the main memory. When the processor needs a particular copy of data or instruction, it first looks into the caches. If the data or instruction is found in the cache (i.e., a cache hit), the processor can quickly resume operation without any delay. Conversely, if the data or instruction is not found in the cache (i.e., a cache miss), it would have to be loaded from the main memory and then supplied to the processor.